• ALJ Bullock Issues Claim Construction Order In Certain Static Random Access Memories (337-TA-792)
  • February 21, 2012 | Authors: John F. Presper; Eric W. Schweibenz
  • Law Firm: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P. - Alexandria Office
  • On February 9, 2012, Chief ALJ Charles E. Bullock issued Order No. 29 construing terms of the asserted claims in Certain Static Random Access Memories and Products Containing Same (Inv. No. 337-TA-792).

    By way of background, this investigation was instituted on July 28, 2011 after Cypress Semiconductor Corp. (“Cypress”) filed a complaint naming as respondents GSI Technology, Inc.; Telefonaktiebolaget LM Ericcson; Ericcson Inc.; Motorola Mobility, Inc.; Motorola Solutions, Inc.; Tellabs, Inc.; Cisco Systems, Inc.; Avnet, Inc.; and Hewlett-Packard Company/Tipping Point (collectively, the “Respondents”).  The patents at issue are U.S. Patent Nos. 6,534,805 (“the ‘805 patent”); 6,651,134 (“the ‘134 patent”); 7,142,477 (“the ‘477 patent”); and 6,262,937 (“the ‘937 patent”).  A Markman hearing was held on October 14, 2011 regarding the interpretation of the claim terms discussed below.

    The ‘805 Patent

    Claims 1, 2 and 4-6 of the ‘805 patent have been asserted against the Respondents.  The parties agreed as to the construction of the terms “active regions,” “substantially oblong active regions,” “substantially oblong polysilicon structures” and “substantially oblong local interconnects.”

    The parties disputed the meaning of the term “local interconnects” in claim 5.  Cypress proposed the construction “short, circuit connections confined to a particular region within a single memory cell,” arguing that the patentee stated in the prosecution history that local interconnects are “confined to a particular region within a single memory cell,” and that the specification states that local interconnects refer to the function of connecting features “within a circuit.”  Respondents proposed the construction “a relatively short circuit connection that does not extend across the entire memory cell,” contending that it is more objectively stated than Cypress’ definition and makes it easier to determine whether the claimed feature exists in a memory device.  ALJ Bullock considered the specification and prosecution history and construed “local interconnects” to mean “a connection that is short relative to a much longer metal connection used for a global connection, is confined to a particular region within a memory cell, and does not extend across the entire memory cell.”

    The ‘134 Patent

    Claims 1, 2 and 12-15 of the ‘134 patent have been asserted against the Respondents.  The parties agreed as to the construction of the terms “external address signal,” “non-interruptible” and “burst.”

    The parties disputed the meaning of the term “internal address signal” in claims 1, 2, 12 and 15.  Specifically, the parties’ proposed constructions centered on their disagreement as to whether “a circuit” in the preamble of claim 1 is a limitation.  The ALJ found that the preamble is necessary to provide context for the ensuing claim term and limits the scope of the invention, and agreed with the Respondents that “internal address signal” means “an address signal that is generated within the circuit claimed by the preamble.”

    The parties also disputed the meaning of the term “logic circuit” in claims 1 and 12.  Cypress contended that this term needs no construction, or alternatively, that it should be construed according to its plain meaning.  Respondents, on the other hand, asserted that the logic circuit resides within the claimed “circuit.”  ALJ Bullock concurred with Cypress that the Respondents’ construction provided little clarity as to the meaning of the term and would render the claim barely comprehensible.  Thus, the ALJ gave “logic circuit” its plain meaning, “a circuit that is designed to perform one or more logic operations or to represent logic functions.”

    In addition, the parties disputed the meaning of the term “predetermined number of [said] internal address signals” in claims 1, 2, 12 and 15.  Cypress again argued that this term needs no construction, or alternatively, that it should be construed according to its plain meaning.  Respondents insisted the object and teaching of the patent is directed to burst accesses, and that any construction that divorces this claim term from a burst access would be untenable.  The ALJ agreed with the Respondents, and construed “predetermined number of [said] internal address signals” as “a fixed number of internal address signals for a burst access.”

    The ‘477 Patent

    Claims 8 and 9 of the ‘477 patent have been asserted against the Respondents.  The parties agreed as to the construction of the terms “sensing read data,” “sending write data across a write path,” “multiplexer,” “in parallel” and “while.”

    The parties disputed the meaning of the terms “storing” and “sending” in claim 8.  Cypress again argued that these terms needs no construction, or alternatively, that they should be construed according to their plain meaning.  Respondents asserted that the specification teaches that the storing and sending must occur on the rising and falling edges of the same clock cycle, which is the only way the disclosed invention an accomplish its purpose of reducing cycle time.  ALJ Bullock found that while the specification contemplates that the claimed “storing” and “sending” can occur on the same clock edge, he disagreed with the Respondents that the only way to achieve faster sequential read and write cycle time is by restricting the storing of the write address and the sending of the read address to different clock edges of a single clock cycle.  Thus, the ALJ construed “storing” and “sending” according to their plain meaning.

    The parties also disputed the meaning of the term “holding the write address held within a set of registers” in claim 9.  Here again, Cypress contended that this term needs no construction, or alternatively, that it should be construed as “holding the write address within a set of registers.”  Respondents argued that because the specification teaches that the “holding back” of a write address occurs after the write address is sent from the register to a latch, this term must be construed as “holding, at the output of the latch, the write address that is stored within a set of registers.”  ALJ Bullock found both parties’ constructions problematic - Cypress’ construction reads the “held” action out of the claim, while the Respondents’ construction imports a limitation from one of the embodiments - and opted to define “holding the write address held within a set of registers” as “holding the write address that is stored within a set of registers.”

    The ‘937 Patent

    Claims 1, 2, 6, 12 and 13 of the ‘937 patent have been asserted against the Respondents.  The parties agreed as to the construction of the term “periodic signal.”

    The parties disputed the meaning of the term “wherein said periodic signal is configured to control data transfer operations” in claim 1.  Cypress argued that it is widely understood in the industry that synchronous circuits such as those claimed in the ‘937 patent are designed to respond or be synchronized to transitions of a periodic signal.  Respondents, however, asserted that the limitation itself and the specification confirm that the periodic signal must control the data transfer operations, which is very different from merely having the two things synchronized in some way.  The ALJ agreed with the Respondents that describing two events as synchronized does not convey the idea of control, and construed the term “wherein said periodic signal is configured to control data transfer operations” according to its plain meaning.

    The parties also disputed the meaning of the term “in response to a - transition of said periodic signal” in claims 1 and 2.  Cypress argued that this term needs no construction, or alternatively, that it should be construed as “corresponding to a transition of said periodic signal.”  Respondents countered that the claim does not recite that two events must simply correspond in some manner, but expressly recites that the data transfer operations occur “in response to” the transitions of the periodic signal.  ALJ Bullock sided with Respondents, finding that the ‘937 patent discloses a causal relationship between the first and second transitions of the periodic signal and the data transfer operations.  Thus, the ALJ defined the term as “caused by the transition of said periodic signal.”

    Further, the parties disputed the meaning of the term “transition” in claims 1 and 2.  Cypress claimed that the plain meaning of “transition” in the context of the ‘937 patent refers to either a falling or rising edge of the signal, and that while a falling or rising edge may result in a change from one state to another, it is unclear from the specification when that change occurs.  Respondents, however, argued that the rising and falling edges of the signal constitute the acts of changing the state of the periodic signal from low to high and vice versa, and that this term therefore means “a falling or rising edge of the periodic signal.”  ALJ Bullock again agreed with Respondents, finding that Cypress provided no evidence from the specification supporting its proposed construction and instead relied solely on extrinsic evidence from the IEEE Dictionary.  Accordingly, the ALJ construed the term “transition” to mean “a falling or rising edge of the periodic signal.”

    Finally, the parties disputed the meaning of the term “complementary” in claim 1.  Cypress argued that this term need not be construed because its plain meaning is clear, or alternatively, that it should mean “reciprocal.”  Respondents contended that in the context of the claimed transitions of a periodic signal, “complementary” is well-understood by those of ordinary skill in the art to mean “opposite.”  ALJ Bullock found that it is unclear whether the next rising edge of the second clock signal can be considered “opposite” to or a “reciprocal” of the rising edge of the first clock signal, thus rendering both parties’ proposed constructions ambiguous; however, according to the specification, it is “the next transition following the first transition of the periodic signal.”  The ALJ therefore construed the term “complementary” to mean “the next subsequent transition of the periodic signal.”